1. Field of the Invention
The present invention relates to integrated circuit manufacture and more particularly to a method to improve nucleation and adhesion of a film/layer deposited onto a low-dielectric constant (low-k) dielectric layer, a high-dielectric constant (high-k) gate dielectric layer, or a high-k capacitor dielectric layer.
2. Description of Related Art
In integrated circuit (IC) manufacturing, as metal pitch scales to 0.2 microns and below, physical vapor deposition (PVD) of a barrier material layer is no longer able to provide sufficient step coverage and alternative technologies must be employed. For these alternative technologies, which include chemical-vapor deposition (CVD) and atomic layer deposition (ALD), film/layer nucleation and/or adhesion onto a substrate is critical. This is especially essential for low-dielectric constant (low-k) polymeric dielectrics that have surface active sites typically below 1xc3x97103 atoms per square centimeter (atom/cm2) compared to 1xc3x971014-15 atom/cm2 in silicon oxide (SiOx). Similar concerns apply to low-dielectric constant dielectrics, such as organic-containing silicon dioxide or carbon-doped oxide (CDO), whose wettability or sticking coefficient can be low due to Sixe2x80x94CH3 surface.
One approach to improve CVD- and ALD-deposited film nucleation and/or adhesion onto low-k dielectrics includes selecting a material as dielectric substrate which may not have the desired dielectric constant performance. Another technique to improve CVD- or ALD-deposited film nucleation and/or adhesion onto low-k dielectrics is to use only certain types of materials for the film/layer, e.g. barrier layer, deposited which may limit the performance of the integrated circuit manufactured. Another approach for improving film nucleation and/or adhesion onto low-k dielectrics is using undesired process conditions, such as high temperatures, to process the substrate having the CVD film.